Sending a Continuous Data Over Uart

Re: unable to receive continuously in UART 2017/12/12 22:35:07 (permalink)

#pragma config OSC = HS         // Oscillator Selection bits (HS oscillator)#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3         // Brown Out Reset Voltage bits (Minimum setting)
// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC   // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = OFF     // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF
#include <stdio.h>
#include <conio.h>
#include <stdlib.h>
#include <stdint.h>
#include <xc.h>
static unsigned char at[]={"AT\r\n"};
unsigned char GloRxBuffer[350] ={0};
void main()
{
uart_init();
while(1)
{
for(i = 0; i < 350; i++)
{
GloRxBuffer = 0;
}
uart_txn1(&at[0]);
uart_rxn2(&GloRxBuffer, 350);
uart_txn1(&GloRxBuffer[0]);
}
}
void uart_init()
{
ANSELD=0x00;
TXSTA1 = 0x24;
RCSTA1=0x90;
//SPEN = 1;        //RCSTAbit7 enable for serial port enable
// TXSTAbit3 enable for high speed baud rate and TXSTAbit5 for transmit enable
SPBRG1 = 129;    // enabling uart receiving
GIE = 1;
PEIE = 1;
RCIE = 1;
TXSTA2 = 0x24;
RCSTA2=0x90;
//SPEN = 1;        //RCSTAbit7 enable for serial port enable
// TXSTAbit3 enable for high speed baud rate and TXSTAbit5 for transmit enable
SPBRG2 = 129;
}
void uart_txn1(unsigned char *data)
{
while(*data != '\0')
{
while(TRMT1 == 0);
TXREG1 = *data++;
//RC6 = TXREG;
}
}
void uart_rxn1(unsigned char *str, uint8_t size)
{
i = 0;
while(size > 0)
{
while(!RC1IF);
str[i++] = RCREG1;
size--;
}
#if 0
//RCIE = 1;
for(int i = 0; i < 349; i++)
{
while(!RC1IF);
GloRxBuffer = RCREG1;
//RCIF = 1;
}

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